Mohammad Khavari Tavana

Author

George Mason University ORCID

Also Known As

Mohammad K. Tavana, Mohammad Khavari Tavana

Publications

413

Citations

H-Index

Concepts

All Affiliations

George Mason University Sharif University of Technology Karlsruhe Institute of Technology Northeastern University Pennsylvania State University

About

Mohammad Khavari Tavana is an author at George Mason University specializing in computer engineering, engineering, and parallel computing.

Top Concepts

#	Concept	H-Index	Publications	Citations
1	Engineering	12	13	312
2	Computer Engineering	12	13	312
3	Computer Science	9	9	224
4	Data Science	2	2	38
5	Biomedical Engineering	1	1	26

Mohammad Khavari Tavana

Publications

333

Citations

H-Index

Page 1

	Year	Citations
Two-State Checkpointing for Energy-Efficient Fault Tolerance in Hard Real-Time Systems M T Zahraei Salehi, Mohammad Khavari Tavana, Semeen Rehman, IEEE Transactions on Very Large Scale Integration (VLSI) Systems EngineeringVerificationComputer ArchitectureCheckpoint IntervalsFault Tolerance	2016	62
DRVS: Power-efficient reliability management through Dynamic Redundancy and Voltage Scaling under variations M T Zahraei Salehi, Mohammad Khavari Tavana, Semeen Rehman, Triple Modular RedundancyEngineeringComputer ArchitectureMultithreading (Computer Architecture)System Reliability	2015	50
Feedback-Based Energy Management in a Standby-Sparing Scheme for Hard Real-Time Systems Mohammad Khavari Tavana, M T Zahraei Salehi, Alireza Ejlali EngineeringEnergy EfficiencyFeedback-based Energy ManagementReal-time System DesignStandby-sparing Scheme	2011	29
Energy-efficient mapping of biomedical applications on domain-specific accelerator under process variation Mohammad Khavari Tavana, Amey Kulkarni, Abbas Rahimi, EngineeringProcess VariationPower Optimization (Eda)Computer ArchitecturePower Optimization	2014	26
dsReliM: Power-constrained reliability management in Dark-Silicon many-core chips under process variations M T Zahraei Salehi, Muhammad Shafique, Florian Kriebel, EngineeringComputer ArchitectureDsrelim SystemHardware SecurityProcess Variations	2015	22
ElasticCore Mohammad Khavari Tavana, Mohammad Hossein Hajkazemi, Divya Pathak, Power-aware ComputingElectrical EngineeringEngineeringHeterogeneous ArchitecturesManycore Processor	2015	21
Exploiting Adaptive Data Compression to Improve Performance and Energy-Efficiency of Compute Workloads in Multi-GPU Systems Mohammad Khavari Tavana, Yifan Sun, Nícolas Bohm Agostini, Cluster ComputingEngineeringGpu BenchmarkingEnergy EfficiencyComputer Architecture	2019	21
Exploring the Potential for Collaborative Data Compression and Hard-Error Tolerance in PCM Memories Amin Jadidi, Mohammad Arjomand, Mohammad Khavari Tavana, Non-volatile MemoryEngineeringComputer ArchitecturePhase Change MemoryMulti-channel Memory Architecture	2017	17
dsReliM: power-constrained reliability management in dark-silicon many-core chips under process variations M T Zahraei Salehi, Muhammad Shafique, Florian Kriebel, International Conference on Hardware/Software Codesign and System Synthesis EngineeringComputer ArchitectureDsrelim SystemHardware SecurityProcess Variations	2015	16
REMAP Mohammad Khavari Tavana, Amir Kavyan Ziabari, Mohammad Arjomand, Proceedings of the International Symposium on Memory Systems Hardware SecurityNon-volatile MemoryElectrical EngineeringData BlockEngineering	2017	13

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