P.T. Hulina

Elimination of static and dynamic hazards for multiple input changes in combinational switching circuits

J.G. Bredeson, P.T. Hulina · Information and Control · 1972 · 38 citations

Engineering, Computer Engineering, Electrical Engineering +16

Memory latency effects in decoupled architectures

L. Kurian, P.T. Hulina, L.D. Coraor · IEEE Transactions on Computers · 1994 · 33 citations

Computing, Computer Engineering, Computer Science +14

Program balance and its impact on high performance RISC architectures

Lizy K. John, V. Reddy, P.T. Hulina et al. · 2002 · 23 citations

Engineering, Computer Engineering, Computer Science +17

Generation of a Clock Pulse for Asynchronous Sequential Machines to Eliminate Critical Races

J.G. Bredeson, P.T. Hulina · IEEE Transactions on Computers · 1971 · 18 citations

Engineering, Computer Engineering, Electrical Engineering +16

Memory latency effects in decoupled architectures with a single data memory module

Lizyamma Kurian, P.T. Hulina, L.D. Coraor · 1992 · 17 citations

Engineering, Computer Engineering, Computer Science +17