Concepedia

Sadayuki Morita

SM

Statistics

Publications

3

Citations

91

H-Index

3

Active since

2005

Affiliations

Renesas Electronics (Japan)(Current)

University of Electro-Communications

Sadayuki Morita is an author at Renesas Electronics (Japan) specializing in cmos circuit design, semiconductor devices, and low-voltage cmos design.

Publications per year

2005–2012

3

Publications

3

A 1.39-V input fast-transient-response digital LDO composed of low-voltage MOS transistors in 40-nm CMOS process

Masafumi Onouchi, K. Otsuga, Yasuto Igarashi et al. · 2011 · 44 citations

, , +16

A low-power four-transistor SRAM cell with a stacked vertical poly-silicon PMOS and a dual-word-voltage scheme

Akira Kotabe, Kensuke Osada, N. Kitai et al. · IEEE Journal of Solid-State Circuits · 2005 · 24 citations

, , +17

An on-chip 250 mA 40 nm CMOS digital LDO using dynamic sampling clock frequency scaling with offset-free TDC-based voltage sensor

K. Otsuga, Masafumi Onouchi, Yasuto Igarashi et al. · 2012 · 23 citations

, , +16

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