Junran Pu

A 5.28-mm² 4.5-pJ/SOP Energy-Efficient Spiking Neural Network Hardware With Reconfigurable High Processing Speed Neuron Core and Congestion-Aware Router

Junran Pu, Wang Ling Goh, Vishnu P. Nambiar et al. · IEEE Transactions on Circuits and Systems I Regular Papers · 2021 · 29 citations

Engineering, Neural Networks (Machine Learning), Small Footprint +18

A Low-Cost High-Throughput Digital Design of Biorealistic Spiking Neuron

Junran Pu, Wang Ling Goh, Vishnu P. Nambiar et al. · IEEE Transactions on Circuits & Systems II Express Briefs · 2020 · 16 citations

Dynamic Behaviors, Engineering, Biorealistic Spiking Neuron +14

0.5V 4.8 pJ/SOP 0.93\mu \mathrm{W}$ Leakage/core Neuromorphic Processor with Asynchronous NoC and Reconfigurable LIF Neuron

Vishnu P. Nambiar, Junran Pu, Y. K. Lee et al. · 2020 · 15 citations

Engineering, Vlsi Design, Global Clock Tree +19

A Low Power and Low Area Router With Congestion-Aware Routing Algorithm for Spiking Neural Network Hardware Implementations

Junran Pu, Wang Ling Goh, Vishnu P. Nambiar et al. · IEEE Transactions on Circuits & Systems II Express Briefs · 2020 · 13 citations

Engineering, Computer Architecture, Interconnection Network Architecture +24

Coreset: Hierarchical neuromorphic computing supporting large-scale neural networks with improved resource efficiency

Liwei Yang, Huaipeng Zhang, Tao Luo et al. · Neurocomputing · 2021 · 13 citations