Priyanka Raina - Concepedia

Author

Priyanka Raina

Also Known As

P. Raina, Priyanka R., Priyanka R. M., Priyanka Raina, Priyanka. R, R Priyanka, R. PRIYANKA, R. Priyanka, R.M. Priyanka, Raghavaraju Mohana Lakshmi Priyanka

123

Publications

Citations

H-Index

Concepts

All Affiliations

Stanford University Tsinghua University Massachusetts Institute of Technology University of Notre Dame University of California San Diego

About

Priyanka Raina is an author at Stanford University specializing in engineering, computer engineering, and computer science.

Top Concepts

#	Concept	H-Index	Publications	Citations
1	Engineering	17	22	1.8K
2	Social Sciences	3	3	228
3	Arts	1	1	12
4	Cognitive Science	1	1	65
5	Communication	1	1	12

Priyanka Raina

Publications

2.6K

Citations

H-Index

Page 1

	Year	Citations
A compute-in-memory chip based on resistive random-access memory Weier Wan, Rajkumar Kubendran, Clemens Schaefer, Nature	2022	739
Timeloop: A Systematic Approach to DNN Accelerator Evaluation Angshuman Parashar, Priyanka Raina, Yakun Sophia Shao, Architecture Design SpaceDeep Neural NetworksEngineeringMachine LearningHardware Acceleration	2019	513
Simba Yakun Sophia Shao, Jason Clemons, Rangharajan Venkatesan, EngineeringHardware AccelerationData ScienceEdge ComputingHigh-performance Architecture	2019	363
Interstellar Xuan Yang, Mingyu Gao, Qiaoyi Liu, Manycore ProcessorEngineeringProgram MappingsHardware AccelerationDense Dnn Accelerators	2020	182
33.1 A 74 TMACS/W CMOS-RRAM Neurosynaptic Core with Dynamically Reconfigurable Dataflow and In-situ Transposable Weights for Probabilistic Graphical Models Weier Wan, Rajkumar Kubendran, Sukru Burc Eryilmaz, EngineeringComputer ArchitectureIn-situ Transposable WeightsNeurochipSocial Sciences	2020	136
A 0.32–128 TOPS, Scalable Multi-Chip-Module-Based Deep Neural Network Inference Accelerator With Ground-Referenced Signaling in 16 nm Brian Zimmer, Rangharajan Venkatesan, Yakun Sophia Shao, IEEE Journal of Solid-State Circuits EngineeringHardware AccelerationCustom AcceleratorsEnergy EfficiencyGround-referenced Signaling	2020	105
SAPIENS: A 64-kb RRAM-Based Non-Volatile Associative Memory for One-Shot Learning and Inference at the Edge Haitong Li, Wei-Chen Chen, Akash Levy, IEEE Transactions on Electron Devices Artificial IntelligenceFew-shot LearningEngineeringMachine LearningOne-shot Learning	2021	65
CHIMERA: A 0.92-TOPS, 2.2-TOPS/W Edge AI Accelerator With 2-MByte On-Chip Foundry Resistive RAM for Efficient Training and Inference Kartik Prabhu, Albert Gural, Zainab F. Khan, IEEE Journal of Solid-State Circuits EngineeringMachine LearningHardware AlgorithmComputer ArchitectureHardware Systems	2022	60
Interstellar Xuan Yang, Mingyu Gao, Qiaoyi Liu, arXiv (Cornell University) Manycore ProcessorEngineeringProgram MappingsHardware AccelerationDense Dnn Accelerators	2020	56
A 0.11 pJ/Op, 0.32-128 TOPS, Scalable Multi-Chip-Module-based Deep Neural Network Accelerator with Ground-Reference Signaling in 16nm Brian Zimmer, Rangharajan Venkatesan, Yakun Sophia Shao, Peak TopsEngineeringHardware AccelerationGround-referenced SignalingMesh Network	2019	51

Page 1