T. Nagamatsu

A 0.9-V, 150-MHz, 10-mW, 4 mm/sup 2/, 2-D discrete cosine transform core processor with variable threshold-voltage (VT) scheme

Tadahiro Kuroda, Takeshi Fujita, S. Mita et al. · IEEE Journal of Solid-State Circuits · 1996 · 473 citations

Engineering, Computer Engineering, Electrical Engineering +17

A 200 MHz 13 mm/sup 2/ 2-D DCT macrocell using sense-amplifying pipeline flip-flop scheme

M. Matsui, Hiroyuki Hara, Yoshiharu Uetani et al. · IEEE Journal of Solid-State Circuits · 1994 · 146 citations

Engineering, Computer Engineering, Electrical Engineering +17

200 MHz video compression macrocells using low-swing differential logic

M. Matsui, Hiroyuki Hara, K. Seta et al. · 2002 · 47 citations

Engineering, Computer Engineering, Electrical Engineering +11

A single-chip MPEG2 video decoder LSI

T. Demura, T. Oto, K. Kitagaki et al. · 2002 · 40 citations

Computing, Computer Science, Computer Graphics +16

A 5 Gb/s 8×8 ATM switch element CMOS LSI supporting five quality-of-service classes with 200 MHz LVDS interface

Yasuo Unekawa, Keiko Seki-Fukuda, K. Sakaue et al. · 2002 · 31 citations

Engineering, Computer Engineering, Computer Science +14