V. Degalahal - Concepedia

Author

V. Degalahal

Pennsylvania State University

Also Known As

V. Degalahal, V.S. Degalahal, Vijay Degalahal

Publications

843

Citations

H-Index

Concepts

All Affiliations

Pennsylvania State University New Jersey Institute of Technology Xilinx (United States)

About

V. Degalahal is an author at Pennsylvania State University specializing in computer architecture, computer engineering, and engineering.

Top Concepts

#	Concept	H-Index	Publications	Citations
1	Engineering	14	14	813
2	Computer Engineering	14	14	813
3	Computer Science	8	8	436
4	Electrical Engineering	8	8	470
5	Physics	1	1	10

V. Degalahal

Publications

823

Citations

H-Index

Page 1

	Year	Citations
Soft error and energy consumption interactions Lin Li, V. Degalahal, N. Vijaykrishnan, EngineeringEnergy EfficiencyEnergy ConversionComputer ArchitectureLeakage Optimization Techniques	2004	115
A hybrid SoC interconnect with dynamic TDMA-based transaction-less buses and on-chip networks T.D. Richardson, Chrysostomos Nicopoulos, D. Park, System On ChipElectrical EngineeringDtdma BusCurrent Bus ArchitecturesEngineering	2006	87
Methodology for high level estimation of FPGA power consumption V. Degalahal, Tim Tuan Power ConsumptionElectrical EngineeringPower-aware ComputingEngineeringVlsi Design	2005	79
Compiler-directed instruction cache leakage optimization Wei Zhang, Jie Hu, V. Degalahal, International Symposium on Microarchitecture EngineeringComputer ArchitectureProcessor ArchitectureSoftware AnalysisHardware Security	2002	78
Soft errors issues in low-power caches V. Degalahal, Lin Li, Vijaykrishnan Narayanan, IEEE Transactions on Very Large Scale Integration (VLSI) Systems ReliabilityHardware SecurityElectrical EngineeringSoft Errors IssuesEngineering	2005	73
Compiler-Directed Instruction Duplication for Soft Error Detection Jie Hu, Feihui Li, V. Degalahal, Design, Automation, and Test in Europe EngineeringCompiler TechnologyComputer ArchitectureSoftware EngineeringSoft Error Detection	2005	59
Analyzing soft errors in leakage optimized SRAM design V. Degalahal, N. Vijaykrishnan, M.J. Irwin Hardware SecurityNon-volatile MemoryElectrical EngineeringMemory ArchitectureEngineering	2003	53
The effect of threshold voltages on the soft error rate [memory and logic circuits] V. Degalahal, R. Ramanarayanan, N. Vijaykrishnan, Low-power ElectronicsHardware SecurityElectrical EngineeringEngineeringVlsi Design	2004	49
Modeling Soft Errors at the Device and Logic Levels for Combinational Circuits R. Ramanarayanan, V. Degalahal, R. Krishnan, IEEE Transactions on Dependable and Secure Computing Logic LevelsEngineeringVlsi DesignCombinational CircuitsComputer Architecture	2008	49
Analysis of soft error rate in flip-flops and scannable latches R. Ramanarayanan, V. Degalahal, N. Vijaykrishnan, Hardware SecurityLow-power ElectronicsElectrical EngineeringGate CapacitanceEngineering	2004	44

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