NeuFlow: A runtime reconfigurable dataflow processor for vision

Clément Farabet, Berin Martini, Benoit Corda, +3

Event-based VisionScene AnalysisEngineeringVideo ProcessingComputer Architecture +16

A 240 G-ops/s Mobile Coprocessor for Deep Neural Networks

Vinayak Gokhale, Jonghoon Jin, Ayşegül Dündar, +2

Deep Neural NetworksEngineeringHardware AccelerationEdge ComputingHigh-performance Architecture +11

Hardware accelerated convolutional neural networks for synthetic vision systems

Clément Farabet, Berin Martini, Polina Akselrod, +3

Convolutional Neural NetworkEngineeringHardware AlgorithmImage AnalysisPattern Recognition +14

Embedded Streaming Deep Neural Networks Accelerator With Applications

Ayşegül Dündar, Jonghoon Jin, Berin Martini, +1

IEEE Transactions on Neural Networks and Learning Systems

Embedded PlatformDeep Neural NetworksMachine VisionEngineeringHardware Acceleration +13

Continuous Time Level Crossing Sampling ADC for Bio-Potential Recording Systems

Wei Tang, Ahmad Osman, Dong‐Soo Kim, +5

IEEE Transactions on Circuits and Systems I Regular Papers

Sampling (Signal Processing)Medical ElectronicsEngineeringConversion EfficiencyAnalog Design +17

NeuFlow: Dataflow vision processing system-on-a-chip

Phi-Hung Pham, Darko Jelaca, Clément Farabet, +3

System On ChipHardware ArchitectureMachine VisionImage AnalysisEngineering +13

Recurrent Neural Networks Hardware Implementation on FPGA

Andre Xian Ming Chang, Berin Martini, Eugenio Culurciello

arXiv (Cornell University)

EngineeringMachine LearningHardware AccelerationLarge ParallelismHardware Algorithm +12

An efficient implementation of deep convolutional neural networks on a mobile coprocessor

Jonghoon Jin, Vinayak Gokhale, Ayşegül Dündar, +3

Convolutional Neural NetworkEngineeringMachine LearningGeneral Purpose ProcessorsHardware Algorithm +16

Memory access optimized routing scheme for deep networks on a mobile coprocessor

Ayşegül Dündar, Jonghoon Jin, Vinayak Gokhale, +2

Convolutional Neural NetworkEngineeringHardware AlgorithmComputer ArchitectureMemory Access +18

4-Channel asynchronous bio-potential recording system

Wei Tang, Chenxi Huang, Dong‐Soo Kim, +2

Chip SizeMedical ElectronicsBiomedical SensorsEngineeringData Converter +11