Xinlin Geng

A 25.8GHz Integer-N PLL With Time-Amplifying Phase-Frequency Detector Achieving 60fs_rms Jitter, -252.8dB FoM_J, and Robust Lock Acquisition Performance

Xinlin Geng, Yibo Tian, Yao Xiao et al. · 2022 IEEE International Solid- State Circuits Conference (ISSCC) · 2022 · 37 citations

Engineering, Electrical Engineering, Analog Electronics +12

A Sub-50-fs_rms Jitter Fractional-<i>N</i> CPPLL Based on a Dual-DTC-Assisted Time-Amplifying Phase-Frequency Detector With Cascadable DTC Nonlinearity Compensation Algorithm

Zonglin Ye, Xinlin Geng, Yao Xiao et al. · IEEE Journal of Solid-State Circuits · 2024 · 17 citations

Engineering, Electrical Engineering, Analog Electronics +16

A 25.8-GHz Integer-N CPPLL Achieving 60-fs rms Jitter and Robust Lock Acquisition Based on a Time–Amplifying Phase–Frequency Detector

Xinlin Geng, Zonglin Ye, Yao Xiao et al. · IEEE Transactions on Microwave Theory and Techniques · 2023 · 15 citations

Engineering, Electrical Engineering, Analog Electronics +14

A 26GHz Fractional-N Charge-Pump PLL Based on A Dual-DTC-Assisted Time-Amplifying-Phase-Frequency Detector Achieving 37.1fs and 45.6fs rms Jitter for Integer-N and Fractional-N Channels

Xinlin Geng, Zonglin Ye, Yao Xiao et al. · 2023 · 13 citations

Engineering, Computer Engineering, Electrical Engineering +17

A 0.0325-mm² 114-to-147-GHz 6-Bit Passive Vector-Modulated Phase Shifter With MN-Embedded Isolated Power Combiner Achieving &lt;3.7° RMS Phase Error in 65-nm CMOS

Zhenyi Zhang, Maoxuan Yang, Xinlin Geng et al. · IEEE Transactions on Circuits and Systems I Regular Papers · 2023 · 10 citations

Engineering, Electrical Engineering, Analog Electronics +16