Concepedia

S.D. Haynes

SH

Statistics

Publications

4

Citations

134

H-Index

4

Active since

1998

Affiliations

Imperial College London(Current)

S.D. Haynes is an author at Imperial College London specializing in computer science, engineering, and field-programmable gate arrays.

Publications per year

1998–2003

4

Publications

4

Video image processing with the Sonic architecture

S.D. Haynes, Janice M. Stone, Peter Y. K. Cheung et al. · Computer · 2000 · 70 citations

, , +15

A reconfigurable multiplier array for video image processing tasks, suitable for embedding in an FPGA structure

S.D. Haynes, Peter Y. K. Cheung · 2002 · 23 citations

, , +17

Flexible reconfigurable multiplier blocks suitable for enhancing the architecture of FPGAs

S.D. Haynes, A. Ferrari, Peter Y. K. Cheung · 2003 · 23 citations

, , +17

Configurable multiplier blocks for embedding inFPGAs

S.D. Haynes, Peter Y. K. Cheung · Electronics Letters · 1998 · 18 citations

, , +13

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