Javier Jalle

A Dual-Criticality Memory Controller (DCmc): Proposal and Evaluation of a Space Case Study

Javier Jalle, Eduardo Quiñones, Jaume Abella et al. · 2014 · 53 citations

Engineering, Computer Architecture, Dual-criticality Systems +20

Deconstructing bus access control policies for Real-Time multicores

Javier Jalle, Jaume Abella, Eduardo Quiñones et al. · 2013 · 28 citations · Full text

Engineering, Real-time System Design, Computer Architecture +17

Increasing confidence on measurement-based contention bounds for real-time round-robin buses

Gabriel Fernàndez, Javier Jalle, Jaume Abella et al. · 2015 · 19 citations · Full text

Engineering, Computer Architecture, Longest Delay +21

Contention-aware performance monitoring counter support for real-time MPSoCs

Javier Jalle, Mikel Fernández, Jaume Abella et al. · 2016 · 19 citations · Full text

Cluster Computing, Engineering, Computer Architecture +19

Bus designs for time-probabilistic multicore processors

Javier Jalle, Leonidas Kosmidis, Jaume Abella et al. · Design, Automation & Test in Europe Conference & Exhibition (DATE), 2014 · 2014 · 16 citations

Engineering, Computer Architecture, Processor Architecture +17