Bart Mesman

Memory-centric accelerator design for Convolutional Neural Networks

Maurice Peemen, Arnaud A. A. Setio, Bart Mesman et al. · 2013 · 333 citations · Full text

Engineering, Computer Architecture, Fpga Board +17

Task-level timing models for guaranteed performance in multiprocessor networks-on-chip

Peter Poplavko, Twan Basten, M. Bekooij et al. · 2003 · 93 citations

Engineering, Computer Architecture, Dynamic Application +16

Multiprocessor systems synthesis for multiple use-cases of multiple applications on FPGA

Akash Kumar, Shakith Fernando, Yajun Ha et al. · ACM Transactions on Design Automation of Electronic Systems · 2008 · 64 citations · Full text

Engineering, Multiprocessor Systems Synthesis, Computer Architecture +21

MOVE-Pro: A low power and high code density TTA architecture

Yifan He, Dongrui She, Bart Mesman et al. · 2011 · 41 citations

Engineering, Computer Architecture, Processor Architecture +16

High performance predictable histogramming on GPUs

Cedric Nugteren, Gert-Jan van den Braak, Henk Corporaal et al. · 2011 · 40 citations