V. Kamakoti - Concepedia

Author

V. Kamakoti

Also Known As

K. Veezhinathan, Kamakoti V, Kamakoti V., Kamakoti Veezhinathan, Kamakoti v, Kamakoti, V., Ray, Indrajit, V Kamakoti, V Kamakoti., V. Kamakoti

183

Publications

1.5K

Citations

H-Index

121

Concepts

All Affiliations

Indian Institute of Technology Madras Texas Instruments (United States)Texas Instruments (India)

About

V. Kamakoti is an author at Indian Institute of Technology Madras specializing in engineering, computer engineering, and computer architecture.

Top Concepts

#	Concept	H-Index	Publications	Citations
1	Engineering	22	37	980
2	Health Sciences	1	1	11
3	Language Studies	1	1	11
4	Natural Sciences	1	1	12
5	Social Sciences	1	1	25

V. Kamakoti

Publications

Citations

H-Index

Page 1

	Year	Citations
Efficient Building Blocks for Reversible Sequential Circuit Design Siva Kumar Sastry Hari, Shyam Shroff, Noor Mahammad Sk, Conference proceedings Hardware SecurityCircuit ComplexityLogic SynthesisReversible LogicEngineering	2006	73
Attention guided grad-CAM : an improved explainable artificial intelligence model for infrared breast cancer detection Kaushik Raghavan, B. Sivaselvan, V. Kamakoti Multimedia Tools and Applications Artificial IntelligenceImage AnalysisMachine VisionData ScienceMachine Learning	2023	60
A bus encoding technique for power and cross-talk minimization P. Subrahmanya, R. Manimegalai, V. Kamakoti, EngineeringEnergy EfficiencyPower Optimization (Eda)Computer ArchitectureIterative Decoding	2004	50
SHAKTI Processors: An Open-Source Hardware Initiative Neel Gala, Arjun Menon, Rahul Bodduna, EngineeringComputer ArchitectureSoftware EngineeringShakti ProcessorsProcessor Architecture	2016	43
Shakti-T Arjun Menon, Subadra Murugan, Chester Rebeiro, Hardware SecurityEngineeringHigh-performance ArchitectureComputer ArchitectureComputer Engineering	2017	42
PROLEMus: A Proactive Learning-Based MAC Protocol Against PUEA and SSDF Attacks in Energy Constrained Cognitive Radio Networks Milan Patnaik, V. Kamakoti, Vashek Matyáš, IEEE Transactions on Cognitive Communications and Networking Hardware SecurityDynamic Spectrum ManagementCognitive Radio Resource ManagementEngineeringCognitive Radio	2019	40
Glitch-Aware Pattern Generation and Optimization Framework for Power-Safe Scan Test V.R. Devanathan, C.P. Ravikumar, V. Kamakoti Proceedings - IEEE VLSI Test Symposium/Proceedings of the ... IEEE VLSI Test Symposium EngineeringPower Optimization (Eda)Scan CompressionDft ArchitectureComputer Architecture	2007	38
ProBLeSS: A Proactive Blockchain Based Spectrum Sharing Protocol Against SSDF Attacks in Cognitive Radio IoBT Networks Milan Patnaik, G. Prabhu, Chester Rebeiro, IEEE Networking Letters Blockchain Consensus ProtocolEngineeringInformation SecurityCryptographyProactive Blockchain	2020	38
SHAKTI-F: A Fault Tolerant Microprocessor Architecture Sukrat Gupta, Neel Gala, Giyyarpuram Madhusudan, Hardware SecurityTriple Modular RedundancyFault-tolerant NetworkEngineeringVlsi Design	2015	37
Karna: A Gate-Sizing based Security Aware EDA Flow for Improved Power Side-Channel Attack Protection Patanjali SLPSK, Prasanna Karthik Vairam, Chester Rebeiro, Hardware TrojanEngineeringInformation SecurityPower Optimization (Eda)Computer Architecture	2019	37

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