Low-power linear computation using nonlinear ferroelectric tunnel junction memristors

Radu Berdan, Takao Marukame, Kensuke Ota, +5

Nature Electronics

Electrical EngineeringEngineeringLow-power Linear ComputationNonlinear CircuitNanoelectronics +3

A Neuromorphic Chip Optimized for Deep Learning and CMOS Technology With Time-Domain Analog and Digital Mixed-Signal Processing

Daisuke Miyashita, Shouhei Kousai, Tomoya Suzuki, +1

IEEE Journal of Solid-State Circuits

EngineeringMachine LearningEnergy EfficiencyComputer ArchitectureNeurochip +18

In-memory Reinforcement Learning with Moderately-Stochastic Conductance Switching of Ferroelectric Tunnel Junctions

Radu Berdan, Takao Marukame, Shoichi Kabuyanagi, +5

EngineeringIn-memory Reinforcement LearningEfficient Reinforcement LearningMobile DeploymentPhase Change Memory +14

Three-Dimensionally Stacked Analog Retinal Prosthesis Chip

Jun Deguchi, Taiichiro Watanabe, Tomonori Nakamura, +2

Japanese Journal of Applied Physics

Electrical EngineeringMedical ElectronicsEngineeringRetinal Prosthesis ChipOphthalmology +10

Time-domain neural network: A 48.5 TSOp/s/W neuromorphic chip optimized for deep learning and CMOS technology

Daisuke Miyashita, Shouhei Kousai, Tomoya Suzuki, +1

EngineeringTsop/s/w Neuromorphic ChipComputer ArchitectureNeurochipNeuromorphic Engineering +16

A Fully Integrated 2 $\times$ 1 Dual-Band Direct-Conversion Mobile WiMAX Transceiver With Dual-Mode Fractional Divider and Noise-Shaping Transimpedance Amplifier in 65 nm CMOS

Jun Deguchi, Daisuke Miyashita, Yosuke Ogasawara, +10

IEEE Journal of Solid-State Circuits

Mixed-signal Integrated CircuitNm CmosIntegrated 2Mobile Wimax TransceiversFully Integrated 2 +2

A 187.5µVrms-read-noise 51mW 1.4Mpixel CMOS image sensor with PMOSCAP column CDS and 10b self-differential offset-cancelled pipeline SAR-ADC

Jun Deguchi, Fumihiko Tachibana, M. Morimoto, +9

Low-power ElectronicsElectrical EngineeringChip SizeEngineeringCalibration +13

Adaptive Quantization Method for CNN with Computational-Complexity-Aware Regularization

Kengo Nakata, Daisuke Miyashita, Jun Deguchi, +1

Adaptive Quantization MethodConvolutional Neural NetworkQuantization Step SizeImage AnalysisMachine Learning +12

A 0.6V 380µW −14dBm LO-input 2.4GHz double-balanced current-reusing single-gate CMOS mixer with cyclic passive combiner

Jun Deguchi, Daisuke Miyashita, Mototsugu Hamada

Low-power ElectronicsElectrical EngineeringLo-input 2.4GhzMixer TopologiesEngineering +8

FPGA-based CNN Processor with Filter-Wise-Optimized Bit Precision

Asuka Maki, Daisuke Miyashita, Kengo Nakata, +3

Convolutional Neural NetworkWeight BitMachine LearningEngineeringHardware Acceleration +10