B. S. Premananda

Design and performance analysis of modified unsigned braun and signed Baugh-Wooley multiplier

Vinay B. Biradar, P. G. Vishwas, C. S. Chetan et al. · 2017 International Conference on Electrical, Electronics, Communication, Computer, and Optimization Techniques (ICEECCOT) · 2017 · 24 citations

Engineering, Computer Engineering, Computer Science +17

Performance Analysis of MD5 and SHA-256 Algorithms to Maintain Data Integrity

Shwetha R. Prasanna, B. S. Premananda · 2021 · 21 citations

Computing, Computer Science, Cybersecurity +11

Design of low power barrel shifter and vedic multiplier with kogge-stone adder using reversible logic gates

G. V. Nikhil, B. P. Vaibhav, Vishnu G. Naik et al. · 2017 · 19 citations

Engineering, Computer Engineering, Electrical Engineering +17

Design and Implementation of High Frequency and Low-Power Phase-locked Loop

B. S. Premananda, T. N. Dhanush, Vaishnavi S. Parashar et al. · U Porto Journal of Engineering · 2021 · 17 citations · Full text

Engineering, Electrical Engineering, Low-power Design +16

Design of Compact Vedic Multiplier for High Performance Circuits

V. G. Pooja, B. S. Premananda, G. Ramesh · 2018 · 15 citations

Engineering, Computer Engineering, Electrical Engineering +12