Statistics
Publications
5
Citations
85
H-Index
5
Active since
2004
Affiliations
Kun Shan University(Current)
Guo-Ruey Tsai is an author at Kun Shan University specializing in field-programmable gate array architecture, fpga architecture, and engineering.
Publications per year
2004–2008
5
5
FPGA-Based High Area Efficient Time-To-Digital IP Design
Min‐Chuan Lin, Guo-Ruey Tsai, Chunyi Liu et al. · 2006 · 34 citations
Engineering, Computer Engineering, Electrical Engineering +15
FPGA-Based Spectrum Analyzer with High Area Efficiency by Goertzel Algorithm
Min‐Chuan Lin, Guo-Ruey Tsai, Yung-Chin Tu et al. · 2008 · 15 citations
Watermarking Technique for HDL-based IP Module Protection
Min‐Chuan Lin, Guo-Ruey Tsai, Chun-Rong Wu et al. · 2007 · 10 citations
1–5 of 5