Seyed Mohammad Ali Zeinolabedin

An Area-Efficient 128-Channel Spike Sorting Processor for Real-Time Neural Recording With <inline-formula> <tex-math notation="LaTeX">$0.175~\mu$ </tex-math> </inline-formula>W/Channel in 65-nm CMOS

Anh Tuan, Seyed Mohammad Ali Zeinolabedin, Dongsuk Jeon et al. · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2018 · 50 citations

Area-efficient 128-Channel, Engineering, Vlsi Design +21

A 16-Channel Fully Configurable Neural SoC With 1.52 $\mu$W/Ch Signal Acquisition, 2.79 $\mu$W/Ch Real-Time Spike Classifier, and 1.79 TOPS/W Deep Neural Network Accelerator in 22 nm FDSOI

Seyed Mohammad Ali Zeinolabedin, Franz Marcus Schüffny, Richard George et al. · IEEE Transactions on Biomedical Circuits and Systems · 2022 · 45 citations · Full text

Nm Fdsoi Soc, Neural Probes, Medical Electronics +24

A 128-channel spike sorting processor featuring 0.175 µW and 0.0033 mm²per channel in 65-nm CMOS

Seyed Mohammad Ali Zeinolabedin, Anh Tuan, Dongsuk Jeon et al. · 2016 · 19 citations

Low-power Electronics, Power-aware Computing, Engineering +15

Energy-Efficient Data-Aware SRAM Design Utilizing Column-Based Data Encoding

Anh Tuan, Seyed Mohammad Ali Zeinolabedin, Tony Tae-Hyoung Kim · IEEE Transactions on Circuits & Systems II Express Briefs · 2019 · 13 citations

Design of a hybrid neural spike detection algorithm for implantable integrated brain circuits

Seyed Mohammad Ali Zeinolabedin, Anh Tuan, Kiat Seng Yeo et al. · 2015 · 10 citations · Full text

Engineering, Neurochip, Social Sciences +17