Correction to Integrated Circuits and Logic Operations Based on Single-Layer MoS₂

Abstract

ADVERTISEMENT RETURN TO ISSUEPREVAddition/CorrectionNEXTORIGINAL ARTICLEThis notice is a correctionCorrection to Integrated Circuits and Logic Operations Based on Single-Layer MoS2Branimir Radisavljevic, Michael B. Whitwick, and Andras Kis*View Author Information Electrical Engineering Institute, Ecole Polytechnique Federale de Lausanne (EPFL), CH-1015 Lausanne, SwitzerlandCite this: ACS Nano 2013, 7, 4, 3729Publication Date (Web):March 6, 2013Publication History Published online6 March 2013Published inissue 23 April 2013https://pubs.acs.org/doi/10.1021/nn400553ghttps://doi.org/10.1021/nn400553gcorrectionACS PublicationsCopyright © 2013 American Chemical Society. This publication is available under these Terms of Use. Request reuse permissions This publication is free to access through this site. Learn MoreArticle Views2552Altmetric-Citations17LEARN ABOUT THESE METRICSArticle Views are the COUNTER-compliant sum of full text article downloads since November 2008 (both PDF and HTML) across all institutions and individuals. These metrics are regularly updated to reflect usage leading up to the last few days.Citations are the number of other articles citing this article, calculated by Crossref and updated daily. Find more information about Crossref citation counts.The Altmetric Attention Score is a quantitative measure of the attention that a research article has received online. Clicking on the donut icon will load a page at altmetric.com with additional details about the score and the social media presence for the given article. Find more information on the Altmetric Attention Score and how the score is calculated. Share Add toView InAdd Full Text with ReferenceAdd Description ExportRISCitationCitation and abstractCitation and referencesMore Options Share onFacebookTwitterWechatLinked InRedditEmail PDF (53 KB) Get e-AlertscloseSUBJECTS:Circuits,Contact resistance,Insulators,Transistors Get e-Alerts