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A-IGZO FETs with High Current and Remarkable Stability for Vertical Channel Transistor(VCT) / 3D DRAM Applications
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2024
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Unknown Venue
We report the a-IGZO channel FET exhibited high Ion (<tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$22\mu \mathrm{A}/\mu \mathrm{m}$</tex> with <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\mathrm{V}_{\text{GS}}=\mathrm{V}_{\text{th}}+1\mathrm{V}$</tex> and <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\mathrm{V}_{\text{DS}}=1\mathrm{V}$</tex>) and excellent NBTI characteristics (<tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\Delta \mathrm{V}_{\text{th}} < 1\ \text{mV}$</tex> at 3 MV/cm, 85 °C). In order to realize such a high performance device, there are several considerations, one of which is finding the optimal composition that increases mobility and keeps device reliability characteristics stable, and the next is to understand the effects of various process conditions on channel behavior and effectively suppress oxygen vacancies (V<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">o</inf>) while lowering hydrogen (H) concentration. Specifically, we tried to apply an interlayer to contact metal, reduced the H in the bottom oxide, and finally optimized the condition of a gate oxide (G<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ox</inf>) process and O<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> treatment method that could efficiently minimize defect states in the device.