Evaluation of Dynamic R_ON, Coss Loss, and Short-Circuit Ruggedness of 650V and 1200V Industrial Vertical GaN JFETs

Abstract

Dynamic on-resistance <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$R_{\text{ON}}$</tex>, hysteresis output capacitance (Coss) loss, and short-circuit (SC) capability are three crucial reliability and robustness concerns facing many GaN high-electron mobility transistors (HEMTs). It has been unclear if these issues are inherent to GaN devices or can be resolved by using an alternative GaN device architecture. This work answers this question by characterizing the dynamic <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$(R_{\text{ON}})$</tex>, Coss loss, and short-circuit capability of an industrial vertical GaN device, the NexGen's GaN-on-GaN JFET, under a common circuit platform. As all these three characteristics depend on gate driving condition, we deploy a common driving condition in three circuit tests, which is also identical to the device driving condition in practical converter applications. A similarly-rated commercial Schottky-type p-gate GaN HEMT is characterized in the same circuits for comparison. The vertical GaN JFET shows no dynamic <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$R$</tex><inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ON</inf> issue, lower Coss loss, and a longer SC withstanding time (t<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">SC</inf>) compared to GaN HEMT. These results suggest GaN power devices with proper design can achieve excellent stability and robustness.