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High‐<i>κ</i> Dielectric (HfO<sub>2</sub>)/2D Semiconductor (HfSe<sub>2</sub>) Gate Stack for Low‐Power Steep‐Switching Computing Devices

25

Citations

54

References

2024

Year

Abstract

Herein, a high-quality gate stack (native HfO<sub>2</sub> formed on 2D HfSe<sub>2</sub>) fabricated via plasma oxidation is reported, realizing an atomically sharp interface with a suppressed interface trap density (D<sub>it</sub> ≈ 5 × 10<sup>10</sup> cm<sup>-2</sup> eV<sup>-1</sup>). The chemically converted HfO<sub>2</sub> exhibits dielectric constant, κ ≈ 23, resulting in low gate leakage current (≈10<sup>-3</sup> A cm<sup>-2</sup>) at equivalent oxide thickness ≈0.5 nm. Density functional calculations indicate that the atomistic mechanism for achieving a high-quality interface is the possibility of O atoms replacing the Se atoms of the interfacial HfSe<sub>2</sub> layer without a substitution energy barrier, allowing layer-by-layer oxidation to proceed. The field-effect-transistor-fabricated HfO<sub>2</sub>/HfSe<sub>2</sub> gate stack demonstrates an almost ideal subthreshold slope (SS) of ≈61 mV dec<sup>-1</sup> (over four orders of I<sub>DS</sub>) at room temperature (300 K), along with a high I<sub>on</sub>/I<sub>off</sub> ratio of ≈10<sup>8</sup> and a small hysteresis of ≈10 mV. Furthermore, by utilizing a device architecture with separately controlled HfO<sub>2</sub>/HfSe<sub>2</sub> gate stack and channel structures, an impact ionization field-effect transistor is fabricated that exhibits n-type steep-switching characteristics with a SS value of 3.43 mV dec<sup>-1</sup> at room temperature, overcoming the Boltzmann limit. These results provide a significant step toward the realization of post-Si semiconducting devices for future energy-efficient data-centric computing electronics.

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