Analysis of GAA Junction Less NS FET Towards Analog and RF Applications at 30 nm Regime

Abstract

This research focuses on a quantum model created using an entirely novel nanosheet FET. The standard model describes the performance of a Gate-all-around (GAA) Junction-less (JL) nanosheet device with a gate dielectric of SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> and HfO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> , each having a thickness of 1 nm. The performance of both the classical and quantum models of the GAA nanosheet device is evaluated using the visual TCAD tool, which measures the <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">I_ON</i> , <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">I_OFF</i> , <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">I_ON/ I_OFF</i> , threshold voltage, DIBL, gain parameters (g <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">m</sub> , g <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">d</sub> , A <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">v</sub> ), gate capacitance, and cut-off frequency ( <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">f_T</i> ). The device is suited for applications needing rapid switching since it has a low gate capacitance of the order of 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">–18</sup> , according to the simulation results. A transconductance (g <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">m</sub> ) value of 21 μS and an impressive cut-off frequency of 9.03 GHz are displayed during device analysis. A detailed investigation has also been done into the P-type device response for the same device. Finally, the proposed GAA nanosheet device is used in the inverter model. The NSFET-based inverter, although having higher gate capacitance, has the shortest propagation latency.