Design a novel 1-bit full adder with hybrid logic for full-swing, area-efficiency and high-speed

Performance analysis of low-power 1-bit CMOS full adder cells

A.M. Shams, T. Darwish, Magdy Bayoumi · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2002 · 494 citations

Engineering, Computer Engineering, Electrical Engineering +17

Design of Robust, Energy-Efficient Full Adders for Deep-Submicrometer Design Using Hybrid-CMOS Logic Style

Sumeer Goel, Ashok Kumar, Magdy Bayoumi · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2006 · 447 citations

Engineering, Computer Engineering, Electrical Engineering +17

Gate-diffusion input (GDI): a power-efficient method for digital combinatorial circuits

Arkadiy Morgenshtein, Alexander Fish, Israel A. Wagner · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2002 · 374 citations

Engineering, Computer Engineering, Electrical Engineering +17

CMOS Full-Adders for Energy-Efficient Arithmetic Applications

M. Aguirre-Hernandez, Mónico Linares Aranda · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2010 · 348 citations

Engineering, Computer Engineering, Electrical Engineering +17

Performance Analysis of a Low-Power High-Speed Hybrid 1-bit Full Adder Circuit

Partha Bhattacharyya, Bijoy Kundu, Sovan Ghosh et al. · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2014 · 316 citations

Engineering, Computer Engineering, Electrical Engineering +17