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Experimental Demonstration of CeO<sub>2</sub>-Based Tunable Gated Memristor for RRAM Applications
14
Citations
46
References
2023
Year
SemiconductorsElectrical EngineeringElectronic DevicesEngineeringElectronic MaterialsMetal ElectrodesNanoelectronicsElectronic MemoryEmerging Memory TechnologyApplied PhysicsGated MemristorRram ApplicationsCerium DioxideMemory DeviceSemiconductor MemoryMicroelectronicsElectrochemistry
This paper reports the fabrication and characterization of a cerium dioxide (CeO2)-based gated memristor with metal electrodes. The fabricated device exhibits memristive behavior, owing to the intrinsic oxygen vacancies originating from the utilized solution combustion method of synthesizing CeO2. By configuration of the biasing, this memristor can serve as either a conventional two-terminal (2T) memristor or a three-terminal (3T) gated memristor, offering the capability to adjust the set voltage (VSET). Electrical assessments affirm that this constructed memristor boasts an exceptionally high ROFF/RON ratio (∼105) and a low VSET of 0.756 V. At a compliance current (ICC) of 20 mA, the device displays a remarkably low activation slope of 3.5 mV/decade. Additionally, it demonstrates outstanding cyclic stability, reproducibility, and data retention even after 105 cycles. In the three-terminal, or 3T, configuration, manipulation of the gate voltage can precisely control the VSET. We elucidate the operational theory of this gated memristor, focusing on electroformation. Numerical simulations illustrating the two-dimensional electric field profiles of the device support the findings from physical experiments, affirming the validity of the electroformation concept within the active layer. The ability to adjust VSET through the back gate bias enhances its utility in analog VLSI and data conversion. Furthermore, its impressive ROFF/RON ratio positions it as an ideal candidate for resistive random access memory.
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