A 1024-Channel 268 nW/pixel 36x36 μm²/ch Data-Compressive Neural Recording IC for High-Bandwidth Brain-Computer Interfaces

Abstract

This paper presents a neural recording IC featuring lossy compression during digitization, thus preventing data deluge and enabling a compact active digital pixel design. The wired-OR-based compression discards unwanted baseline samples while allowing the reconstruction of spike samples. The IC features a 32x32 MEA with $36 \mu m$ pixel pitch and consumes 268nW per pixel from a single 1V supply. It achieves $9.8 \mu V_{RMS}$ input-referred noise and 0.3-5kHz bandwidth, resulting in NEF/PEF of 3.7/14.1.