IEEE Access · 2023 · 13 citations · 20 references
EngineeringBiomedical EngineeringCardiologyBioinstrumentationBiomedical Signal ProcessingClinical CardiologyCardiac AssessmentCardiac Signal ProcessingCardiovascular MonitoringElectrocardiographyVital SignsVital Signs RecordingAnalog Front-end CircuitsAutomated Vital Signs CaptureCardiac Monitoring SystemsHeart Murmur AssessmentHeart Sound AnalysisHeart Sound AuscultationSignal AcquisitionSound Signals
This paper proposes an intelligent stethoscope system that synchronously displays the electrocardiogram (ECG) and heart sound. The instrument, which accelerates auscultation, can be used for the diagnosis of valvular heart disease (VHD) for clinical physicians. The whole system with ECG patch and stethoscope includes four parts, namely, an analog front-end circuit for bio-signal acquisition, a heart sound-classifying integrated circuit with convolution neural network (CNN), a user-friendly application that synchronously displays the heart sound and ECG signals, and a cloud server with heart murmur detection algorithm for human study. In this system, three algorithms are used in processing both ECG and heart sound signals. The first algorithm is a synchronized algorithm, which can align heart sound and ECG signals simultaneously. The second algorithm is a heart sound-classifying algorithm that can distinguish the first (S1) and the second (S2) heart sound in heart sound signals for identifying the systolic and diastolic phases. The accuracies of the algorithm applied to normal heart sound and heart murmur are 100% and 96.7%, respectively. The third algorithm is heart murmur identification, which can detect systolic murmur and has a macro f1 score of 92.5%. The three algorithms proposed are beneficial for physicians in the diagnosis of VHD. After the establishment of the whole system, a CNN-based classification algorithm is also implemented with a <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$0.18 \mu \text{m}$ </tex-math></inline-formula> standard CMOS process for the demonstration of the edge computing. The machine learning techniques are implemented on the chip to accelerate the classification process.
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