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A 76–81 GHz 2×8 MIMO Radar Transceiver With Broadband Fast Chirp Generation and 16-Antenna-in-Package Virtual Array

35

Citations

27

References

2023

Year

Abstract

This article presents a 76–81 GHz millimeter-wave (mm-wave) radar transceiver and a 2 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\times $ </tex-math></inline-formula> 8 multi-input multi-output (MIMO) antenna-in-package (AiP) for automotive radar applications. The proposed transceiver chip consists of a frequency-modulated-continuous-wave (FMCW) radar waveform generator, a 3-channel sub-transmitter (Tx), and a 4-channel receiver (Rx) with integrated analog-to-digital converters (ADC). A two-point modulation scheme and a digital-to-analog converter’s (DAC) dynamic bias technique are adopted in the FMCW generator to achieve fast chirps and broad modulation bandwidth. A maximum modulation bandwidth of 7.2 GHz is measured. A measured maximum chirp rate reaches 312 MHz/ <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{s}$ </tex-math></inline-formula> while the rms linearity stays less than 0.32%. The measured best-case chirp linearity peak error is 0.018% when the chirp rate is set as 9.21 MHz/ <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{s}$ </tex-math></inline-formula> . Two transceiver chips operating in a primary-secondary mode, 2 Tx antennas, and 8 Rx antennas are packaged in the embedded glass fan-out (eGFO) technology for better detection capability. Each Tx patch antenna is fed by three power amplifier (PA) outputs through a coaxial feeding structure. The measured Tx effective isotropic radiated power (EIRP) is improved by 7.5 dB compared to a single-feed antenna. Therefore, the chipset demo shows a detection range of up to 38.5 m. The transceiver chip is fabricated in a 65 nm CMOS technology and occupies 5.8 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\times $ </tex-math></inline-formula> 5.8 mm2. The packaged 2 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\times $ </tex-math></inline-formula> 8 MIMO AiP chipset is 24 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\times $ </tex-math></inline-formula> 24 mm2.

References

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