LeFlow: Enabling Flexible FPGA High-Level Synthesis of Tensorflow Deep\n Neural Networks

Abstract

Recent work has shown that Field-Programmable Gate Arrays (FPGAs) play an\nimportant role in the acceleration of Machine Learning applications. Initial\nspecification of machine learning applications are often done using a\nhigh-level Python-oriented framework such as Tensorflow, followed by a manual\ntranslation to either C or RTL for synthesis using vendor tools. This manual\ntranslation step is time-consuming and requires expertise that limit the\napplicability of FPGAs in this important domain. In this paper, we present an\nopen-source tool-flow that maps numerical computation models written in\nTensorflow to synthesizable hardware. Unlike other tools, which are often\nconstrained by a small number of inflexible templates, our flow uses Google's\nXLA compiler which emits LLVM code directly from a Tensorflow specification.\nThis LLVM code can then be used with a high-level synthesis tool to\nautomatically generate hardware. We show that our flow allows users to generate\nDeep Neural Networks with very few lines of Python code.\n