Characterization and Modeling of Quantum Dot Behavior in FDSOI Devices

Abstract

A compact analytical model is proposed along with a parameter extraction methodology to accurately capture the steady-state (DC) sequential tunnelling current observed in the subthreshold region of the transfer IDS-VGS characteristics of MOSFETs at cryogenic temperatures. The model is shown to match measurements of p-MOSFETs and n-MOSFETs manufactured in a commercial 22nm FDSOI foundry technology, with reasonable accuracy across bias conditions and temperature (2 K -50 K). Furthermore, the extracted model parameters are used to analyze the impact of the gate and drain voltages and of layout geometry on the device characteristics.