Weak write test mode: an SRAM cell stability design for test technique

Abstract

The detection of cell stability and data retention faults in SRAMs has been a time consuming process. In this paper we discuss a new design for test technique called Weak Write Test Mode (WWTM). This technique applies test circuitry which attempts to overwrite the data stored in SRAM cells. It is designed so that only defective cells are overwritten. The resulting test has a shorter test time and improved detection capability. In addition, WWTM has a low silicon area cost and no impact to product performance. Silicon results are reported.