Implementation of the symmetric doped double-gate MOSFET model in Verilog-A for circuit simulation

Abstract

Abstract Recently we developed a model for symmetric double‐gate MOSFETs (SDDGM) that, for the first time, considers the doping concentration in the Si film in the complete range from 1×10 14 to 3×10 18 cm −3 . The model covers a wide range of technological parameters and includes short channel effects. It was validated for different devices using data from simulations, as well as measured in real devices. In this paper, we present the implementation in Verilog‐A code of this model, which allows its introduction in commercial simulators. The Verilog‐A implementation was optimized to achieve reduction in computational time, as well as good accuracy. Results are compared with data from 2D simulations, showing a very good agreement in all transistor operation regions. Copyright © 2009 John Wiley & Sons, Ltd.