Design and Testing of 6 kV H-bridge Power Electronics Building Block Based on 10 kV SiC MOSFET Module

Abstract

This paper presents a part of the design for a power electronics building block (PEBB) based on 10 kV SiC MOSFET power module. A H-bridge PEBB system architecture is introduced at the beginning, followed by the design details of a smart gate driver. Strong noise-immunity, high driving current and effective protection circuitry have been accomplished. The design of power supply that feeds the gate drivers while providing 10 kV galvanic isolation is also shown. A resonant current bus (RCB)-based topology is proposed to supply the gate drivers, achieving both high density and low input-output capacitance of the isolation. Finally, a 10 kV laminated DC bus-bar with new layer-stacking structure is presented. Experimental results are embedded in each section to validate the PEBB performance.