A 1.5 V 14 b 100 MS/s self-calibrated DAC

Yonghua Cong, R.L. Geiger

2003 · 29 citations · 2 references

Concepts

Abstract

A calibrated 14 b current-steering DAC is fabricated in a 0.13 /spl mu/m digital CMOS process. The DAC achieves 14 b static linearity with a single 1.5 V supply, and the core occupies 0.1 mm/sup 2/. Dynamic linearity is improved through reduction of parasitic effects. At 100 MS/s, the SFDR is 82 dB and 62 dB at signals of 0.9 MHz and 42.5 MHz, respectively. Power consumption is 16.7 mW.

References

2