CINNAMON: Coupled Integration and Nodal Analysis of MOS Networks

Abstract

The use of simulation tools to verify the behavior of integrated circuits is a well established technique for circuit design. This paper describes a novel approach for circuit simulation that promises a significant improvement over conventional methods. The algorithm involves an explicit event driven technique that seems stable even when the accuracy of the solution is relaxed, and is able to perform automatic and dynamic partitioning of the network, thus allowing the full exploitation of latency in large digital networks. Although the basic method could be generalized for any type of circuit, in this paper the scope is limited to MOS integrated circuits.