Publication | Open Access
16kbit HfO<sub>2</sub>:Si-based 1T-1C FeRAM Arrays Demonstrating High Performance Operation and Solder Reflow Compatibility
28
Citations
2
References
2021
Year
Low-power ElectronicsElectrical EngineeringEngineeringVlsi DesignCrystalline Defects1T-1c Feram ArraysNanoelectronicsEmerging Memory TechnologyApplied PhysicsComputer EngineeringSolder Reflow CompatibilitySemiconductor Device FabricationSemiconductor MemoryArray LevelMicroelectronicsZero Bit FailureSemiconductor Device
16kbit 1T-1C FeRAM arrays are demonstrated at 130nm node with TiN/Hf02:Si/TiN ferroelectric capacitors integrated in the Back-End-of-Line (BEOL). Zero bit failure is reported at the array level, with memory window fully open down to 2.5V programming voltage, capacitor area down to 0.16µm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> and switching speed down to 4ns. Promising endurance is reported at the array level up to 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">7</sup> cycles. For the first time, solder reflow compatibility is demonstrated for HfO <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> -based FeRAM. These results pave the way to competitive ultra-low power embedded non-volatile memories at more advanced nodes.
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