Publication | Closed Access
An FBAR Driven −261dB FOM Fractional-N PLL
21
Citations
4
References
2021
Year
Unknown Venue
EngineeringVlsi DesignHigh-frequency Fbar ReferenceData ConverterMixed-signal Integrated CircuitAnalog Design−261Db Fom PllComputer EngineeringReference Noise GainDigital Circuit DesignMicroelectronicsSignal ProcessingAnalog-to-digital Converter
A 1mW −261dB FOM PLL with 91fs jitter is presented that combines a low-noise, high-frequency FBAR reference with the unity-gain harmonic-mixing (HM) PLL to minimize reference noise gain and avoid entirely the amplification of sigma-delta modulator quantization noise and fractional spurs, which, in turn, allows for a substantially larger loop bandwidth to suppress the VCO noise and speed settling.
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