A 24.5–29.5GHz Broadband Parallel-to-Series Combined Compact Doherty Power Amplifier in 28-nm Bulk CMOS for 5G Applications

Abstract

This paper proposes a parallel-to-series combined Doherty power amplifier (PA) in 28-nm bulk CMOS technology that improves the operation bandwidth and minimizes the die area for the Doherty output network. The two-stage differential Doherty PA shows a saturated output power (P<inf>OUT</inf>) of &#x003E;18.8dBm and a peak power-added efficiency (PAE) of &#x003E;30&#x0025; at 27GHz CW. Under the 5G NR 64QAM OFDM signal (<tex>$\text{PAPR} &#x003E; 10\text{dB}$</tex>), the PA achieves a linear P<inf>OUT</inf> of 12.4dBm and an average PAE of 20.2&#x0025; at an EVM of &#x2212;25dB. Over the frequency range of 24.5-29.5GHz, the PA exhibits a linear P<inf>OUT</inf> of &#x003E;11.2dBm and a PAE of &#x003E;14.5&#x0025; <tex>$(\text{DE} &#x003E; 20.8\%)$</tex>. This compact PA IC occupies <tex>$640\times 250\mu\mathrm{m}^{2}$</tex> (core).