Benchmarking the Performance of Heterogeneous Stacked RRAM with CFETSRAM and MRAM for Deep Neural Network Application Amidst Variation and Noise

Abstract

In this article we demonstrate and compare the performance of 32nm technology node compatible high-K and low-K stacked RRAM with CFET-SRAM and MRAM for binary deep neural network. We have fabricated heterogenous stacked RRAM with Sidoped Al <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> and Ta <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">5</sub> as stacked layer for synaptic memory application. The device demonstrated an exorbitant on/off ratio ~ 4.2 x 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sup> with an ultra-low variation (σ ~ 6E-07 S). We have trained the neural network with 97.11% accuracy as baseline and observed the impact of conductance variation and read noise variation. We have also benchmarked the performance of our device with CFET-SRAM and MRAM technologies from other works and observed superior performance of our devices in terms of accuracy.