A SiGe-Source Doping-Less Double-Gate Tunnel FET: Design and Analysis Based on Charge Plasma Technique with Enhanced Performance

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Jean-Pierre Colinge, Chi‐Woo Lee, Aryan Afzalian et al. · Nature Nanotechnology · 2010 · 2.4K citations

Engineering, Electrical Engineering, Materials Science +12

Leakage current mechanisms and leakage reduction techniques in deep-submicrometer CMOS circuits

Kaushik Roy, Subhas Chandra Mukhopadhyay, Hamid Mahmoodi · Proceedings of the IEEE · 2003 · 2.3K citations

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Use of Negative Capacitance to Provide Voltage Amplification for Low Power Nanoscale Devices

Sayeef Salahuddin, Supriyo Datta · Nano Letters · 2007 · 2.1K citations

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Double-Gate Tunnel FET With High- Gate Dielectric

Kathy Boucart, Adrian Ionescu · IEEE Transactions on Electron Devices · 2007 · 1.7K citations · Full text

Engineering, Electrical Engineering, Materials Science +15

Device scaling limits of Si MOSFETs and their application dependencies

D.J. Frank, R.H. Dennard, E. Nowak et al. · Proceedings of the IEEE · 2001 · 1.6K citations

Engineering, Computer Engineering, Electrical Engineering +17