Publication | Open Access
Van der Waals engineering of ferroelectric heterostructures for long-retention memory
236
Citations
43
References
2021
Year
The limited memory retention of ferroelectric field‑effect transistors has hindered commercialization of their nonvolatile memory potential using commercially available ferroelectrics. We aim to demonstrate a long‑retention ferroelectric transistor memory cell built from van der Waals single crystals in a metal‑ferroelectric‑metal‑insulator‑semiconductor architecture. The device employs a metal‑ferroelectric‑metal‑insulator‑semiconductor stack fabricated entirely from van der Waals crystals to achieve trap‑free interfaces and reduced depolarization. The transistor achieves 17 mV dec⁻¹ operation, >3.8 V memory window, >10⁷ program/erase ratio, >10⁴ cycles endurance, 10‑year retention, sub‑5 µs program/erase, 100 ns polarization reversal, and 4‑bit/cell operation, demonstrating van der Waals engineering as a promising route for high‑performance ferroelectric memory.
The limited memory retention for a ferroelectric field-effect transistor has prevented the commercialization of its nonvolatile memory potential using the commercially available ferroelectrics. Here, we show a long-retention ferroelectric transistor memory cell featuring a metal-ferroelectric-metal-insulator-semiconductor architecture built from all van der Waals single crystals. Our device exhibits 17 mV dec-1 operation, a memory window larger than 3.8 V, and program/erase ratio greater than 107. Thanks to the trap-free interfaces and the minimized depolarization effects via van der Waals engineering, more than 104 cycles endurance, a 10-year memory retention and sub-5 μs program/erase speed are achieved. A single pulse as short as 100 ns is enough for polarization reversal, and a 4-bit/cell operation of a van der Waals ferroelectric transistor is demonstrated under a 100 ns pulse train. These device characteristics suggest that van der Waals engineering is a promising direction to improve ferroelectronic memory performance and reliability for future applications.
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