Publication | Open Access
An Overview of Hardware Security and Trust: Threats, Countermeasures, and Design Tools
185
Citations
237
References
2020
Year
Hardware TrojanEngineeringDesign ToolsInformation SecurityVerificationComputer ArchitectureFormal VerificationHardware SecurityHardware DesignTrusted Execution EnvironmentSecure ComputingHardware Security SolutionComputer EngineeringRobust Hardware DesignComputer ScienceData SecurityCryptographyTrustworthy ComputingTrusted PlatformSecurity
Hardware security has become critical as global supply chains and ubiquitous connectivity expose devices to cross‑layer attacks that can steal IP, hijack control flow, and compromise root of trust, prompting extensive development of detection and fortification techniques. This review surveys hardware security threats, countermeasures, and design tools to encourage designers and EDA developers to integrate security into robust hardware design, testing, and verification.
Hardware security and trust have become a pressing issue during the last two decades due to the globalization of the semiconductor supply chain and ubiquitous network connection of computing devices. Computing hardware is now an attractive attack surface for launching powerful cross-layer security attacks, allowing attackers to infer secret information, hijack control flow, compromise system root-of-trust, steal intellectual property (IP), and fool machine learners. On the other hand, security practitioners have been making tremendous efforts in developing protection techniques and design tools to detect hardware vulnerabilities and fortify hardware design against various known hardware attacks. This article presents an overview of hardware security and trust from the perspectives of threats, countermeasures, and design tools. By introducing the most recent advances in hardware security research and developments, we aim to motivate hardware designers and electronic design automation tool developers to consider the new challenges and opportunities of incorporating an additional dimension of security into robust hardware design, testing, and verification.
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