Single-Chip CMOS Reconfigurable Dual-Band Tri-Mode High-Efficiency RF Amplifier Design

Abstract

This brief presents a new design methodology of single-chip reconfigurable CMOS RF power amplifier (PA) supporting both dual-band and multi-power-mode operation. The proposed architecture utilizes a novel switched-capacitor based output network to facilitate differential signal combining and impedance transformation at two widely separated frequency bands. It can offer three distinct output power levels (saturation) to be selected for multi-power-mode applications. Besides, closed-form explicit equations are readily available for the evaluation of component values. For verification, a PA operating at 1.8/2.6 GHz (non-concurrent), with three distinct saturation power levels (21, 23, 26 dBm) and peak efficiency of about 30%, is designed and fabricated using 0.35 μm CMOS process.