Qutrit Randomized Benchmarking

Alexis Morvan, Vinay Ramasesh, Machiel Blok, John Mark Kreikebaum, Kevin P. O’Brien, Larry Chen, Brad Mitchell, Ravi Naik, David I. Santiago, Irfan Siddiqi

Physical Review Letters · 2021 · 135 citations · 41 references

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TL;DR

Ternary quantum processors offer significant computational advantages over conventional qubit technologies by encoding and processing information in three‑level systems. The study aims to evaluate and compare the performance of emerging ternary quantum processors by developing robust benchmarking methods for higher‑dimensional Hilbert spaces. The authors extend standard randomized benchmarking protocols to ternary logic, using interleaved RB to characterize individual gates and simultaneous RB to quantify crosstalk errors. The experiments on a superconducting five‑qutrit processor yield a single‑qutrit process infidelity of 3.8×10⁻³, a two‑qutrit CSUM gate fidelity of 0.85, and demonstrate RB‑based tools for diagnosing control errors in qutrit hardware.

Abstract

Ternary quantum processors offer significant potential computational advantages over conventional qubit technologies, leveraging the encoding and processing of quantum information in qutrits (three-level systems). To evaluate and compare the performance of such emerging quantum hardware it is essential to have robust benchmarking methods suitable for a higher-dimensional Hilbert space. We demonstrate extensions of industry standard randomized benchmarking (RB) protocols, developed and used extensively for qubits, suitable for ternary quantum logic. Using a superconducting five-qutrit processor, we find an average single-qutrit process infidelity of $3.8\ifmmode\times\else\texttimes\fi{}{10}^{\ensuremath{-}3}$. Through interleaved RB, we characterize a few relevant gates, and employ simultaneous RB to fully characterize crosstalk errors. Finally, we apply cycle benchmarking to a two-qutrit CSUM gate and obtain a two-qutrit process fidelity of 0.85. Our results present and demonstrate RB-based tools to characterize the performance of a qutrit processor, and a general approach to diagnose control errors in future qudit hardware.

References

41