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Design of Low-Power Sub-2.4 dB Mean NF 5G LNAs Using Forward Body Bias in 22 nm FDSOI
47
Citations
20
References
2020
Year
Low-power ElectronicsElectrical EngineeringEngineeringRf SemiconductorDc PowerElectronic EngineeringMixed-signal Integrated CircuitComputer EngineeringLna PerformanceForward Body BiasMicroelectronicsNm FdsoiRf Subsystem
This article presents K/Ka-band low-noise-amplifiers (LNAs) for 5G front ends. The use of forward body bias (FBB) in fully depleted silicon-on-insulator (FDSOI) devices is studied and utilized to improve the LNA performance under reduced supply voltage and dc power (P <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">dc</sub> ). Design procedures targeting high linearity, low noise, and high gain are provided. The two-stage common-source LNA (CS-LNA) achieves sub-2.1 dB mean NF, 20.1 dB peak gain, 9 GHz 3 dB bandwidth (BW) from 19.5 to 28.5 GHz, and an in-band IIP3 of 0 dBm with 9.6 mW P <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">dc</sub> . The single-stage cascode LNA (CAS-LNA) achieves over 10 dB gain, 11 GHz 3 dB BW, and an IIP <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> of 7.5 dBm for a 2.2 dB mean NF. The two-stage CAS-LNA has 28.5 dB peak gain, 4 GHz BW, and 2.25 dB mean NF for 20 mW P <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">dc</sub> . In the low-power mode, the CS-LNA operates at 0.4 V with P <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">dc</sub> of 3.2 mW, 16.9 dB gain, and less than 2.2 dB mean NF, while the two-stage CAS-LNA achieves 2.4 dB NF and 23 dB gain for 5.5 mW. Also, ultralow-power operation and sub-3 dB NF are possible with the CS-LNA at 0.2 V/1 mW with 12 dB gain and for the CAS-LNA at 0.4 V/2.4 mW with 17.7 dB gain. To the best of our knowledge, the single-stage CAS-LNA shows the highest IIP <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> at 28 GHz compared with the published CMOS work. The two-stage FBB CS and CAS designs have the lowest voltage supply, P <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">dc</sub> , and best Figure of Merit (FoM) for mm-waves 5G LNAs in the low-power mode.
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