Semiconductor Science and Technology · 2020 · 10 citations · 15 references
EngineeringMaterials EngineeringMaterials ScienceElectronic MaterialsSemiconductor DevicesSemiconductor MaterialsSemiconductor Device MaterialsSemiconductor HeterostructuresSemiconductor InterfacesSemiconductor PhysicsSilicon MaterialsThermal Properties Of SemiconductorsAnnealingAnnealing Temperature EffectsHigh-temperature Thermal PropertiesRapid Thermal AnnealingThermal AnnealingThermal Annealing EffectsThermal Management Of Semiconductor DevicesThermal Stability
Abstract In this study, the thermal stability of a Si 0.7 Ge 0.3 /Si stacked multilayer for gate-all-around (GAA) MOSFETS is systematically investigated. Rapid thermal annealing (RTA) treatments at temperatures ranging from 800 °C to 1050 °C are performed on the Si 0.7 Ge 0.3 /Si stacked multilayer samples. Compared with the as-grown sample, the RTA-treated (800 °C–900 °C) Si 0.7 Ge 0.3 /Si stacked multilayer samples attain good crystal quality, a sharp interface between Si 0.7 Ge 0.3 and Si, and minor diffusion of Ge. Furthermore, owing to the rapid diffusion of Ge, the thickness of Si 0.7 Ge 0.3 increases by ∼6 nm and the Ge concentration of Si 0.7 Ge 0.3 reduces by ∼3% as the annealing temperature increases to 950 °C. The interfaces of the Si 0.7 Ge 0.3 /Si stacked multilayer disappear and finally behave like a homogeneous SiGe alloy as the annealing temperature further increases to 1000 °C or 1050 °C. Therefore, for thermal stability, the highest tolerable temperature of 900 °C is proposed for the Si 0.7 Ge 0.3 /Si stacked multilayer for the fabrication of the GAA device.
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Stacked nanosheet gate-all-around transistor to enable scaling beyond FinFET
N. Loubet, Terence B. Hook, P. Montanini et al. · 2017 · 988 citations