IEEE Transactions on Power Electronics · 2020 · 11 citations · 15 references
EngineeringElectrical EngineeringEnergy SystemsPower ElectronicsRenewable Energy SystemsAc-dc ConvertersConverter TopologiesDc-ac InvertersDc-dc ConversionDc-dc ConvertersResonant ConvertersBoost Ac-dc ConvertersBoost ConvertersDc-dc Converter TopologiesHigh-efficiency ConverterHigh-frequency IsolationPower Conversion EfficiencyPower Converter DesignPower Mosfets
A SiC three-stage converter architecture of energy recycling dc electronic load with high frequency isolation is proposed. With interleaving boost converters and a LLC-DCX using 1200-V SiC MOSFETs as high frequency isolation pre-regulation stage, the proposed architecture can adapt to wide input voltage of 150-750 V with high efficiency. As the bus voltage is 780 V, a T-type three-level inverter is accepted as grid-connected stage for low leakage current, small grid current harmonics and high conversion efficiency. The transfer mechanism of second harmonic component of the input current ripple is analyzed and is well suppressed by proposed current program control. An overshoot-free soft-start control is proposed to minimize resonant current peak using the inverter reverse operation. The switching frequency reduction modulation control is proposed to solve the extremely low duty-cycle problem under high input voltage and low load condition. A seamless mode transition digital control of three-stage load is proposed with smoothly switched capability between the input current loop and input voltage loop to solve the duty-cycle mutation problem during mode transition. A 5-kW, 300-kHz SiC prototype with 150-750 V input was built. The peak full-load efficiency of three-stage architecture is 95% at 750 V input. The power density is 12.6 W/in <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sup> .
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Juan Luis Agorreta, M. Borrega, Jesús López et al. · IEEE Transactions on Power Electronics · 2010 · 589 citations
Engineering, Electrical Engineering, Systems Engineering +17