Mesh-Structure-Enabled Programmable Multitask Photonic Signal Processor on a Silicon Chip

Abstract

Photonic integrated circuits (PICs) have recently attracted extensive attention in advanced photonic signal processing to meet the ever-increasing demands on high-speed and ultracompact data signal management. However, programmable and multitask photonic signal processing is still full of challenges, especially the scalable photonic integration solution. Here, we design, fabricate, and demonstrate a mesh-structure-enabled programmable multitask photonic signal processor on a silicon chip. It relies on a scalable 2D mesh structure network with a number of hexagonal unit cells formed by building blocks of tunable Mach–Zehnder interferometers (MZIs). We study several simple and complex optical filtering functions using configured single ring resonator, cascaded ring resonators, ring-assisted MZI, cascaded MZIs, reconfigurable and tunable comb filter and (de)interleaver, and double-injection ring resonators. For the proof-of-concept demonstration of on-chip programmable multitask photonic signal processing, a monolithically integrated silicon chip with four hexagonal unit cells is fabricated with greatly reduced geometric dimension. By appropriately adjusting the thermo-optic phase shifters of MZIs, versatile programmable multitask photonic signal processing functions are demonstrated in the experiment with impressive performance, including single ring resonator, cascaded ring resonators, asymmetric MZI, ring-assisted MZI, optical delay line, multiport router, and N × N optical switch. In particular, we also demonstrate the optical interference unit (OIU)-enabled self-configurable router and switch and their practical applications in fiber-optic communication systems. The demonstrations may open up new perspectives for on-chip solutions to ultracompact, reconfigurable, programmable, and multifunctional data signal management in advanced optical communication networks.