Limit-Cycle-Free Digitally Controlled DC–DC Converters Based on Dyadic Digital PWM

Abstract

Quantization-induced limit cycle oscillations (LCOs) in digitally controlled dc-dc converters are addressed in this article. The novel dyadic digital pulsewidth modulator is proposed to increase the effective pulsewidth modulator resolution, as required for LCO-free operation, at low cost, without sacrificing dc accuracy and with no detrimental effects on the ripple voltage. Experimental results on a synchronous buck validate the approach highlighting effective LCOs' suppression and dc accuracy enhancement at 5× reduced peak output voltage ripple and up to 16-dB lower frequency harmonic component reduction compared to thermometric dithering for the same resolution increase.