Linear Active Disturbance Rejection Control for Three-Phase Voltage-Source PWM Rectifier

Abstract

Three-phase voltage-source pulse width modulation (PWM) rectifier has been widely employed in various industrial applications. For the traditional dual-loop PI control of three-phase voltage-source PWM rectifier, the voltage loop and current loop have poor disturbance rejection performance and long response time. A linear active disturbance rejection control (LADRC) strategy is proposed for three-phase voltage-source PWM rectifier in this paper. The coupling variable and external disturbance in the model of PWM rectifier are observed and compensated by linear extended state observer (LESO) in two-phase synchronous reference frame. The LADRC outer-voltage loop controller and LADRC inner-current loop controller of PWM rectifier are designed. The proposed control strategy is compared and verified with PI control and ADRC by MATLAB/Simulink. Simulation and experimental results confirm the superiority of proposed control strategy in dynamic performance and disturbance rejection.