IEEE Journal of Solid-State Circuits · 2019 · 56 citations · 28 references
EngineeringComputer EngineeringElectrical EngineeringAnalog ElectronicsLow-power DesignSensorsCmos Circuit DesignDigital Image ProcessingDynamic Power ReductionImage ProcessingImage SensorsLow-noise Circuit DesignAnalog-to-digital ConversionCmos Analog Integrated CircuitsCmos Image SensorsComplementary Metal-oxide-semiconductor Image SensorsDynamic RangeLow-power Cmos DesignPower ConsumptionRandom Noise
This article presents a 640 × 640 fully dynamic CMOS image sensor for the always-on operation. It consists of a dynamic pixel source follower (SF), whose output signal is sampled into a parasitic column capacitor and then read out by a dynamic single-slope (SS) analog-to-digital converter (ADC) based on a dynamic bias comparator and an energy-efficient two-step counter. The prototype sensor was implemented in a 110-nm CMOS process, achieving 0.3% peak non-linearity, 6.1 e-rms random noise (RN), and 67-dB dynamic range. The power consumption is only 2.1 mW at 44 frames per second (fps) and is further reduced to 140 μW at 5 fps with the subsampled 320 × 320 mode. This sensor achieves a state-of-the-art energy efficiency figure-of-merit of 0.71 e <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-</sup> ·nJ.
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Mark Billinghurst, Adrian Clark, Gun Lee · Foundations and Trends® in Human–Computer Interaction · 2015 · 1.1K citations
Architecture, Design, 3D Modeling +11